1. Field of the Invention
The present invention relates to electronic circuits. More specifically, the present invention relates to providing offset cancellation in a circuit that is used to facilitate intra-chip and/or inter-chip proximity communication.
2. Related Art
Advances in semiconductor technology presently make it possible to integrate large-scale systems, which can include tens of millions of transistors, into a single semiconductor chip. Integrating such large-scale systems onto a single semiconductor chip increases the speed at which such systems can operate, because signals between system components do not have to cross chip boundaries, and are not subject to lengthy chip-to-chip propagation delays. Moreover, integrating large-scale systems onto a single semiconductor chip significantly reduces production costs, because fewer semiconductor chips are required to perform a given computational task.
Unfortunately, these advances in semiconductor technology have not been matched by corresponding advances in inter-chip communication technology. Semiconductor chips are typically integrated onto a printed circuit board that contains multiple layers of signal lines for inter-chip communication. However, signal lines on a semiconductor chip are about 100 times more densely packed than signal lines on a printed circuit board. Consequently, only a tiny fraction of the signal lines on a semiconductor chip can be routed across the printed circuit board to other chips. This problem has created a bottleneck that continues to grow as semiconductor integration densities continue to increase.
Researchers have begun to investigate alternative techniques for communicating between semiconductor chips. One promising technique involves a form of ‘proximity communication’ in which arrays of capacitive transmitters and receivers are integrated onto semiconductor chips to facilitate intra-chip and/or inter-chip communication. For example, if a first chip is situated face-to-face with a second chip so that transmitter pads on the first chip are capacitively coupled with receiver pads on the second chip, the first chip can directly transmit signals to the second chip without having to route the signals through intervening signal lines within a printed circuit board.
To operate effectively, proximity communication requires the ability to accurately detect capacitively coupled signals. Unfortunately, these signals are usually very small due to the relatively weak coupling between chips. Note that the separation between the chips is large relative to the area of the pads, and that increasing the pad area would decrease the number of channels available and would increase the power needed to drive the larger pad. For example, with pad widths and chip separations on the order of microns, the capacitance of coupled proximity connectors may be smaller than a femtoFarad (fF).
Furthermore, existing circuits or receivers often make it challenging to properly determine the polarity of signals. For example, latching differential receivers have input offset voltages, which add to or subtract from the potential voltages applied to the inputs of these receivers. Said differently, the input offset voltage of a continuous receiver is the potential voltage that must be applied to an input of this receiver for the differential outputs to be equal. (Note that the ideal input offset voltage is zero.) Unfortunately, such input offset voltages in receivers or sense amplifiers often dominate other noise sources, such as white noise (i.e., random noise having a power spectral density that is independent of frequency over a band of frequencies), shot noise (i.e., noise associated with statistical fluctuations in the number of charge carriers), or 1/f noise (i.e., noise with having a power spectral density that is proportional to the reciprocal of the frequency). For a latching or clocked receiver, these offset voltages add to or (in the worst case, subtract from) the input signals, thereby reducing the bandwidth of the channel by increasing the time needed to amplify the input signals to the level required by digital circuits (or in the worst case, leads to outputs with the incorrect polarity), limiting the overall sensitivity of the amplifiers, and reducing the reliability of the communication channel (for example, the input offset voltage may result in a communication failure). Similarly, for a continuous amplifier an input offset voltage shifts the common mode voltage and can result in distortion or reduced gain.
A variety of existing circuits and techniques are used to determine and cancel offset voltages in sense amplifiers. However, these approaches suffer from a variety of limitations. For example, one technique cancels offset voltages during equilibration before each amplification cycle. Unfortunately, it is often difficult to correct for voltage offsets and current-factor mismatches that occur during regenerative latching in clocked latches using such continuous measurements. In addition, loading introduced by feedback circuits decreases the speed of the amplifier response and increases power consumption. Other techniques have various drawbacks, such as adding parasitic capacitance to critical internal sense amplifier nodes, increasing power consumption, causing larger quantization errors, and/or increasing circuit complexity.
Hence what is needed is a method and an apparatus for determining and correcting for offset voltages in capacitively coupled circuits without the problems listed above.